A 2.5-V 4-(mu)W Low-Power Delta-Sigma Modulator for Implantable Cardiac Pacemaker with Periodic Bias Current Reduction Technique

摘要

This paper proposes a 2.5 V supply, 4 (mu)W low-power delta-sigma modulator for implantable cardiac pacemaker system. Periodic bias current reduction technique is proposed to reduce the power consumption of delta-sigma modulator implemented with switched-capacitor integrator. 2nd order delta-sigma modulator exploiting mosfets operating in moderate inversion region is fabricated in a CMOS 0.25 (mu)m process. Measurement results of delta-sigma converter show a power dissipation of 4 (mu)W, and 46 dB of peak SNR in a 128 Hz signal bandwidth.