This paper describes an implementation of a compact and low-power 10-bit Floating-Gate Digital-to-Analog Converter (FGDAC). Nonvolatile Floating-Gate voltage references are utilized to build a charge amplifier DAC architecture. This novel implementation eliminates the large element spread and resolution trade-off in the traditional design of charge amplifier voltage-output DACs. The FGDAC was fabricated in a 0.5μm CMOS process and its total area is 0.0522mm{sup}2. The presented experimental data shows that INL and DNL values less than ±0.5LSB (0.68mV) are easily achievable. This structure will enable digital to analog conversion with programmable linearly or nonlinearly spaced levels.
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