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The VLSI implementation of a baseband receiver for DECT based portable applications

机译:基于DECT的基带接收器的VLSI实现,用于基于DECT的便携式应用程序

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A digital area/power efficient VLSI implementation of the baseband part of a DECT demodulator, is introduced. Starting from algorithm level and after exhaustive architecture-level exploration employing low power design techniques andtransformations, we conclude with the hardware implementation of four optimized algorithms. The proposed DECT receiver will be integrated with the processor ASPIS [7,8] implementing the baseband signal processing of a multi-mode terminal GSM/DECTIDCS-1800.
机译:介绍了DECT解调器的基带部分的数字区域/功率高效VLSI实现。从算法级别和经过低功耗设计技术和交易的统治架构勘探之后,我们结论了四种优化算法的硬件实现。所提出的DECT接收器将与处理器ASPIS [7,8]集成,实现多模终端GSM / DECTIDCS-1800的基带信号处理。

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