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FAST FOURIER TRANSFORM CO-PROCESSOR (FFTC) - TOWARDS EMBEDDED GFLOPS

机译:快速傅里叶变换协同处理器(FFTC)-迈向嵌入式GFLOPS

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Many signal processing applications and algorithmsperform their operations on the data in the transformdomain to gain efficiency. The Fourier Transform Co-Processor has been developed with the aim to offloadGeneral Purpose Processors from performing thesetransformations and therefore to boast the overallperformance of a processing module. The IP of thecommercial PowerFFT processor has been selected andadapted to meet the constraints of the spaceenvironment.In frame of the ESA activity “Fast Fourier TransformDSP Co-processor (FFTC)” (ESTEC/Contract No.15314/07/NL/LvH/ma) the objectives were thefollowing:Production of prototypes of a space qualified version ofthe commercial PowerFFT chip called FFTC based onthe PowerFFT IP.The development of a stand-alone FFTC AcceleratorBoard (FTAB) based on the FFTC including theController FPGA and SpaceWire Interfaces to verify theFFTC function and performance.The FFTC chip performs its calculations with floatingpoint precision. Stand alone it is capable computingFFTs of up to 1K complex samples in length in only10μsec. This corresponds to an equivalent processingperformance of 4.7 GFlops. In this mode the maximumsustained data throughput reaches 6.4Gbit/s. Whenconnected to up to 4 EDAC protected SDRAM memorybanks the FFTC can perform long FFTs with up to 1Mcomplex samples in length or multidimensional FFTbasedprocessing tasks.A Controller FPGA on the FTAB takes care of theSDRAM addressing. The instructions commanded viathe Controller FPGA are used to set up the data flowand generate the memory addresses.The presentation will give and overview on the project,including the results of the validation of the FFTC ASICprototypes.
机译:许多信号处理应用程序和算法 在变换中的数据上执行它们的操作 域名获得效率。傅里叶变换有限公司 处理器已开发,旨在卸载 通用处理器来自执行这些 改造并因此夸耀整体 处理模块的性能。的IP 已选择商业Powerfft处理器 适合满足空间的约束 环境。 在ESA活动的框架中“快速傅里叶变换 DSP协处理器(FFTC)“(ESTEC /合同号 15314/07 / nl / lvh / ma)目标是 下列的: 生产空间合格版原型的生产 商业Powerfft芯片称为FFTC基于 Powerfft IP。 独立FFTC加速器的开发 基于FFTC的董事会(FTAB)包括 控制器FPGA和Spacewire接口验证 FFTC功能和性能。 FFTC芯片通过浮动执行其计算 点精度。独自站立它有能力计算 只有1K个复杂样品的FFT才能长度 10μsec。这对应于等效处理 表现为4.7 gflops。在此模式中最大 持续数据吞吐量达到6.4Gbit / s。什么时候 连接到最多4个EDAC受保护的SDRAM内存 银行FFTC可以执行长达1米的长期FFT 长度或多维Fftbased的复杂样本 处理任务。 FTAB上的控制器FPGA照顾 SDRAM寻址。通过指令通过 控制器FPGA用于设置数据流 并生成内存地址。 演示文稿将提供和概述项目, 包括FFTC ASIC验证结果 原型。

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