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A 0.6-V input 94 peak efficiency CCM/DCM digital buck converter in 40-nm CMOS with dual-mode-body-biased zero-crossing detector

机译:0.6V输入94%峰值效率CCM / DCM数字降压转换器在40-NM CMOS中,具有双模体偏置零交叉检测器

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A 0.6-V input, 0.3–0.55V output buck converter is developed in 40-nm CMOS, for low-voltage low-power wireless sensor network systems. The buck converter is able to automatically select DCM or CCM operation, therefore improving the power efficiency and enlarging the output current range, by virtue of the proposed low-power CCM/DCM controller. A dual-mode-body-biased (DMBB) (forward body bias & zero body bias) low-voltage zero-crossing detector is designed to enable DCM operation with both low supply voltage and normal supply voltage. The proposed buck converter achieves a peak efficiency of 94% with an output current range of 50μA to 10mA. Thanks to the DCM operation, the efficiency at an output current of 100μA is improved by 20% and 9%, with an output voltage of 0.35V and 0.5V, respectively.
机译:0.6V输入,0.3-0.55V输出降压转换器以40-nm CMOS开发,用于低压低功耗无线传感器网络系统。降压转换器能够自动选择DCM或CCM操作,从而提高功率效率并扩大输出电流范围,借助于所提出的低功耗CCM / DCM控制器。双模 - 体偏置(DMBB)(正常体偏置和零体偏置)低压零交叉检测器设计用于使DCM操作能够低电源电压和正常电源电压。所提出的降压转换器达到94%的峰值效率,输出电流范围为50μA至10mA。由于DCM操作,100μA的输出电流的效率分别提高了20%和9%,输出电压分别为0.35V和0.5V。

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