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Parallel RISC Architecture. A Functional Approach Based on Backus's FP language

机译:并行RISC架构。基于Backus FP语言的功能方法

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The main consequence of building ad hoc structured hardware for parallel computation is the huge difficulty we have to program it. The paper discusses a new framework introducing the concept of parallel RISC engine, as a simple and efficient solution for executing FP like languages proposed by John Backus [2] as an alternative to the von Neumann style of performing computation. A first version for the hardware solution is already implemented in silicon [12].
机译:构建用于并行计算的即席结构化硬件的主要结果是我们对其编程非常困难。本文讨论了一个引入并行RISC引擎概念的新框架,该框架是执行John Backus [2]提出的FP类语言的一种简单有效的解决方案,可以替代冯·诺依曼(von Neumann)风格的计算方法。硬件解决方案的第一个版本已在芯片中实现[12]。

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