A Hardware Accelerate Simulator for Network Processor Based on FPGA

摘要

With the dramatically increase of the scale of the Network Processor, traditionally verification method can't satisfied the requirement of market due to the limitation of the simulate speed. For solving the verification problems, a novel hardware accelerate simulator for Network Processor based on FPGA is proposed. This simulator improves the simulate speed remarkably. Furthermore, the probed signals of the Network Processor can be dumped into wave file realtimely.