Design and Implementation of A Novel DDFS Based on Enhanced CORDIC

摘要

In this article we propose a novel architecture to implement Direct Digital Frequency Synthesizer (DDFS). The conventional method uses look-up-table, which cannot satisfy with the command of high distinguishable frequency and time, and it would consume much more area. But the proposed one is different which would use enhanced Coordinate Rotation Digital Computer (CORDIC) to take the place. The enhanced CORDIC covers the entire coordinate space, no further more pre-processing and postprocessing operations would be required compared with the conventional one. The proposed architecture of DDFS algorithm has been validated on the platform of FPGA, works normally and uses less area, besides the performance has been improved.