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Characterizing capacity achieving write once memory codes for multilevel flash memories

机译:表征容量的多级闪存实现一次写入存储代码

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This work investigates the structure of capacity achieving write once memory codes with particular attention to the case where each cell of the flash memory device is capable of representing more than one bit. These results are used to characterize the rates achieved across generations for capacity achieving codes as well to construct a high rate ternary two write code. Additionally, the problem of maximizing the sum rate for two writes given that both writes encode at the same rate is considered.
机译:这项工作研究了实现一次写入存储代码的容量结构,尤其要注意闪存设备的每个单元都可以表示一个以上位的情况。这些结果用于表征容量获得代码的跨代获得的速率,以及构建高速率的三重两次写入代码。另外,考虑到两个写入以相同速率编码时最大化两个写入的总速率的问题。

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