A Proposed Output Buffer at 90 nm Technology with Minimum Signal Switching Noise at 83.3MHz

摘要

This paper proposes and describes a new output buffer which uses a comparator to switch one of the parallel output stages. This scheme can be used to control the output resistance of the buffer, which is useful for output signal monitoring. This paper shows that we can actually minimize the switching noise or ringing noise by the same method. We have also compared the results with a conventional buffer and showed that the new buffer is relatively superior. For realistic simulation we have changed the effective inductance and load capacitance of both buffer and showed that our buffer works better than the conventional one in those conditions also. We have done Monte Carlo analysis of both buffer and observed that the new buffer works better in different process variation conditions as well. Simulations have been carried out in 90nm technology node using HSPICE.