首页> 外文会议>2011 IEEE International Symposium on Circuits and Systems >A nanopower CMOS bandgap reference with 30ppm/degree C from −30 degree C to 150 degree C
【24h】

A nanopower CMOS bandgap reference with 30ppm/degree C from −30 degree C to 150 degree C

机译:从-30摄氏度到150摄氏度的30ppm /摄氏度的纳瓦级CMOS带隙基准

获取原文

摘要

A nanopower subthreshold bandgap reference with 30ppm/°C from −30°C to 150°C has been implemented in 0.18µm CMOS. This design is based on weighted ΔVGS and is free of resistors. The major advantage of this design is that with nanopower consumption, the temperature range is extremely wide. To achieve high performance of subthreshold bandgap operating in high temperature (above 80°C), a leakage current elimination technique which enables subthreshold bandgap operate properly until 150°C was proposed. Such modification does not require additional die area and power consumption. This topology can also generate multiple reference voltages whose values are integer times of the minimum reference voltage. The line regulation of the reference voltage is 0.677mV/V when the supply voltage is increased from 1 V to 2.5 V. The core circuit consumes 46nW at 1V at room temperature. The active area occupies 0.0036mm2.
机译:在0.18μmCMOS中已实现了从-30°C至150°C的30ppm /°C的纳瓦级亚阈值带隙基准。该设计基于加权的ΔV GS ,并且没有电阻。这种设计的主要优点是,由于具有纳米功耗,因此温度范围非常宽。为了获得在高温(高于80°C)下工作的亚阈值带隙的高性能,提出了一种使亚阈值带隙正常工作直到150°C的漏电流消除技术。这样的修改不需要额外的管芯面积和功耗。该拓扑还可以生成多个参考电压,其值是最小参考电压的整数倍。当电源电压从1 V增加到2.5 V时,参考电压的线路调节为0.677mV / V。在室温下,于1V时,核心电路的功耗为46nW。有效面积为0.0036mm 2

著录项

相似文献

  • 外文文献
  • 中文文献
  • 专利
获取原文

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号