A low power secure logic style to counteract differential power analysis attacks

摘要

An energy efficient logic which is resistant to differential power analysis attacks is proposed in this paper. It is used to provide security to several encrypting devices like smart cards. The combination of dual-rail logic for security and adiabatic approach for low power, leads to the proposed energy efficient secure logic style. The advantage of the proposed logic over the existing secure logic styles is the reduction in power consumption which is achieved by adiabatic approach. Hspice tool is used to simulate these ideas and a substantial improvement in power consumption over the existing logic styles is observed while maintaining security.