Linear power amplifier architectures and its packaging technologies for new generation smart phone applications

摘要

The design highlight of a power amplifier (PA) for 3G and beyond handset applications is to maximize its power-added efficiency (PAE) with specified linearity requirement at both peak and back-off power levels. In addition to PAE, its cost and size are of very important design considerations among others. The design principle of a linear PA with good PAE is summarized. An overview of different GaAs HBT handset linear PA architectures is presented. Pros and Cons of a single-ended PA and a balanced PA are discussed. The packaging technologies to realize low cost, small size and good performance for PA modules are illustrated. A tri-power mode PA module packaged in 3mm × 3mm × 1mm size is developed using Skyworks super efficiency at low power (SEAL) PA engine and advanced packaging technologies.