A Model for Requirements Traceability in a Heterogeneous Model-Based Design Process: Application to Automotive Embedded Systems

摘要

Requirements traceability modeling is a key issue in real-time embedded design process. In such systems, requirements are of different nature (software-related, system-related, functional or non functional) and must be traced through a multilevel design flow which integrates multiple tools and heterogeneous models. Validation and Verification (V&V) activities must be performed on models and on the final product to check whether they match the initial requirements. Results of design and V&V activities must be able to impact traceability information. We thus propose DARWIN4REQ, a metamodel for requirement traceability, based on three independent flows (requirement model, solution model and V&V model). The new metamodel establishes a link between these flows and affords full traceability of requirements, including those set for heterogeneous models. This paper presents the DARWIN4REQ metamodel and its use in the context of heterogeneous models for requirements modeling, design and V&V. An automotive application illustrates the proposed approach based on UML-profiles such that SYSML, EAST-ADL2 and MARTE for design and on SIMULINK, SyNDEx and TIMESQUARE for V&V activities.