Bridging the HPC Processor-Memory Gap with Quilt Packaging

摘要

High performance computing (HPC) systems are constrained in the areas of performance, power, and cooling. A new 2D technology, called "Quilt Packaging," is presented as a possible solution to positively impact the processor-memory connection in these areas. A straw man architecture based on current HPC nodes in the RedStorm system at Sandia National Laboratories is used to explore the effects of Quilt Packaging on the connection between processor and memory.