A high PSRR low dropout voltage regulator with fast settling response

摘要

A design of a low dropout voltage regulator (LDO) with fast settling response is being reported. This circuit is stable for full load current range from 0 to 150mA. A current boost circuit is being used to improve the transient response. There was an overshoot of mere 10.51mV and settling time achieved was 43.8ns. The PSRR achieved was −84.464dB upto 8.895kHz, and more than −70db till 136.218MHz. The LDO is capable of generating fixed 1V from a supply of 3.0V which on discharging goes to 1.5V. The LDO has been implemented in 0.18µm generic CMOS technology. Simulation result showed that the line regulation achieved was 174.2µV/Vand load regulation was 0.001626%/mA.