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Merging Programming Models and On-chip Networks to Meet the Programmable and Performance Needs of Multi-core Systems on a Programmable Chip

机译:合并编程模型和片上网络以满足可编程芯片上多核系统的可编程和性能需求

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The Reconfigurable Data-Stream Hardware Software Architecture (Redsharc) is a programming model and network-on-a-chip solution designed to scale to meet the performance needs of multi-core systems on a programmable chip. Redsharc uses an abstract API that allows programmers to develop systems of simultaneously executing kernels, in software or hardware, that communicate over a seamless interface. To support high performance systems with numerous hardware kernels, Redsharc incorporates two on-chip networks that directly mimic the API. Our results show that Redsharc running at 200 MHz, 32-bit data widths can achieve 800 MBps per stream from hardware to hardware, 480 MBps for a software to hardware stream, and between 20 MBps and 400 MBps for random access data in blocks, regardless of the number of kernels in the system.
机译:可重配置数据流硬件软件体系结构(Redsharc)是一种编程模型和片上网络解决方案,旨在扩展以满足可编程芯片上多核系统的性能需求。 Redsharc使用抽象API,允许程序员开发同时执行内核的系统,这些内核可以通过软件或硬件通过无缝接口进行通信。为了支持具有众多硬件内核的高性能系统,Redsharc集成了两个直接模仿API的片上网络。我们的结果表明,运行在200 MHz,32位数据宽度的Redsharc从硬件到硬件的每个流可以达到800 MBps,从软件到硬件流的每个流可以达到480 MBps,对于块中的随机访问数据,可以达到20 MBps到400 MBps系统中内核的数量。

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