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A low power and high precision DAC in 0.13µm CMOS for DVS system

机译:用于DVS系统的0.13µm CMOS低功耗高精度DAC

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A low power and high precision digital to analog converter (DAC) for Dynamic Voltage Scaling (DVS) system is presented and demonstrated in this paper. Based on conventional resistor string architecture, the DAC is compensated by digitally controlled on-resistance network to improve output precision. The proposed 5-bit DAC can produce 0.7V∼1.475V, 25mV per step voltage as programmable reference in DVS system. The DAC is implemented by 0.13µm CMOS technology. The static power dissipation is 26.4µW when the power supply voltage is 3.3V and the reference voltage is 0.61V. The simulation results show that the output error is decreased from 5.64mV to 0.43mV after digital calibration. The conversion speed is less than 2.5µs; the digital input code transition frequency of the proposed DAC can reach 400K Hz. The performance satisfies the requirement of DVS system.
机译:本文提出并展示了用于动态电压缩放(DVS)系统的低功耗和高精度数字到模拟转换器(DAC)。基于常规电阻串架构,DAC通过数字控制的导通网络补偿,以提高输出精度。所提出的5位DAC可以在DVS系统中产生0.7V~1.475V,每一步电压为25mV,在DVS系统中是可编程参考。 DAC由0.13μmCMOS技术实施。当电源电压为3.3V时,静态功耗为26.4μW,参考电压为0.61V。仿真结果表明,数字校准后输出误差从5.64mV降至0.43mV。转换速度小于2.5μs;所提出的DAC的数字输入代码转换频率可以达到400kHz。该性能满足DVS系统的要求。

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