Novel dual-rail gates structure and their application in 1-bit-full-adder

摘要

Superconductive Rapid Single Flux Quantum (RSFQ) digital computing system has the tendency to achieve the operating rate of several hundred GHz. Compare to the semiconductor partner, with the pulse width about picoseconds and clock rate of several hundred GHz, the timing uncertainty from fabrication process variations makes it impossible to achieve the large scale integrated chip with global synchronization architecture. Many efforts, in this field, have been made to construct the asynchronous RSFQ timing conformation with advanced performances. In this paper, a novel AND gate and a novel universal gate based on dual-rail methodology are proposed. The new gates have the advantages in less Josephson junction count and less signal time delay over the previous published version. A 1-bit-full-adder has been implemented based on the novel gates, the simulation shows that they function well and can be considered as the candidates in the system construction. Furthermore, the properties of the gates circuits have also been analyzed numerically with its sensitivity for parameters and tolerant for margin error.