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A FPGA-based 7-order 1-bit Sigma-Delta Modulator for High-precision Signa'l Generation

机译:基于FPGA的7阶1位Sigma-Delta调制器,用于高精度信号生成

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This paper presents a design of a FPGA-based 7-order 1-bit sigma-delta modulator with zero points residing in noise band. The modulator, incorporating with a 24-bit sine wave source, a 1-bit DAC and a subsequent reconstruction filter, generates a signal to test a high-precision sigma-delta ADC. The test signal, which contains both sine wave and high frequency noise, is sampled by the ADC under test. Usually, the noise in the test signal can not be fully suppressed by subsequent decimation filters of the ADC. So decimation filters should be taken into account for designing the modulator. To compensate for the noise suppression limitation of the decimation filters, zero points are introduced to the noise band of the modulator noise transfer function (NTF). With the adding of these noise band zero points, the SNR of ADC output data reaches 115dB in the range of 0500Hz, which is about 10dB higher than that of a system without these zero points.
机译:本文提出了一种基于FPGA的7阶1位sigma-delta调制器的设计,该调制器的零点位于噪声带中。该调制器结合了24位正弦波源,1位DAC和后续的重构滤波器,可生成信号以测试高精度sigma-delta ADC。包含正弦波和高频噪声的测试信号由被测ADC采样。通常,测试信号中的噪声不能被后续的ADC抽取滤波器完全抑制。因此,在设计调制器时应考虑抽取滤波器。为了补偿抽取滤波器的噪声抑制限制,将零点引入调制器噪声传递函数(NTF)的噪声带。添加这些噪声带零点后,ADC输出数据的SNR在0500Hz范围内达到115dB,这比没有这些零点的系统的信噪比高约10dB。

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