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Design of Algorithm Verification Platform Based on Arm-Linux

机译:基于Arm-Linux的算法验证平台设计

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摘要

IP core algorithms of communication system based on FPGA usually require a substantial amount of test data. In order to shorten the design cycle of IP core algorithms and reduce the complexity of the test with a large volume of data, we design an algorithm verification platform based on Arm processor. The platform can be used for the FPGA algorithm functionality, reliability testing and solve the problem that the traditional testing methods are difficult to deal with the testing with a large volume of data and a long time. This paper focuses on the software design of the verification platform and the realization of Human-Machine Interaction (HMI). The platform can be easily extended and applied to a variety of communications systems.
机译:基于FPGA的通信系统的IP核心算法通常需要大量的测试数据。为了缩短IP核心算法的设计周期,降低海量数据的测试复杂度,设计了一种基于Arm处理器的算法验证平台。该平台可用于FPGA算法功能,可靠性测试,解决了传统测试方法难以处理海量数据,时间长的问题。本文着重于验证平台的软件设计和人机交互(HMI)的实现。该平台可以轻松扩展并应用于各种通信系统。

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