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Integration of Embedded Capacitors into Flip-Chip Substrate Structures for Improved Power System Noise Decoupling and Charge Supply to the IC

机译:将嵌入式电容器集成到倒装芯片基板结构中,以改善电源系统的噪声去耦和向IC的电荷供应

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The integration of embedded Thick Film capacitors, Thin Film capacitors, and polyimide based planar capacitor materials in IC packages has been investigated by a joint program sponsored by DuPont with the Georgia Institute of Technology Packaging Research Center (PRC). The PRC provided fabrication, modeling and simulation and DuPont provided the component materials. Test vehicles with different designs were fabricated and tested. The test vehicles included embedded ceramic-fired-on-foil Thick Film and Thin Film capacitors with microvia interconnects and structures with planar capacitor layers. Build-up dielectric layers were structured and interconnected by semi-additive processing and laser microvia technology. Measured electrical performance data were used to create models of alternative package designs and to perform simulations to determine the designs offering the most effective power delivery and noise decoupling in accordance with substrates feature needs projected by the ITRS roadmap.
机译:杜邦与佐治亚理工学院封装研究中心(PRC)共同发起了一项联合计划,研究了将嵌入式厚膜电容器,薄膜电容器和基于聚酰亚胺的平面电容器材料集成到IC封装中的过程。 PRC提供制造,建模和仿真,DuPont提供组件材料。制作并测试了具有不同设计的测试车辆。测试车辆包括嵌入式陶瓷箔上烧成的厚膜和薄膜电容器,它们具有微孔互连和具有平面电容器层的结构。堆积的介电层通过半添加处理和激光微孔技术进行结构化和互连。测得的电气性能数据用于创建替代封装设计的模型,并进行仿真,以确定根据ITRS路线图预计的基板功能需求提供最有效的功率传输和噪声去耦的设计。

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