Design of 4-Channel Asynchronous Serial Communications Interface

摘要

Asynchronous serial communications are frequently used for data exchange between test system and the peripheral to be tested in research and development of automatic test systems. However, in most conditions, a test system with a single CPU can not meet the demand of multi-channel asynchronous serial communications. In the design of an automatic test system that takes FPGA+DSP as its core architecture, we develop a new approach to 4-channel serial interface based on the asynchronous communications element (ACE) TL16C554, which makes 4-channel full duplex asynchronous serial communications possible. In this paper, the structure and characteristics of ACE TL16C554 are introduced at first, and then the design of the interface is described in detail according to the serial communications protocols. The interface controller is implemented in FPGA in Verilog HDL and the initialization of the ACE is conducted by DSP. It has been demonstrated that the 4-channel asynchronous serial interface works stably and reliably.