Compilation Techniques Specific for a Hardware Cryptography-Embedded Multimedia Mobile Processor

摘要

A single chip VLSI processor is the key technology of ever growing pervasive computing to answer overall demands for mobility, speed, security, etc. Thus, we have so far exploited a hardware cryptography-embedded multimedia mobile processor architecture, HCgorilla. Since HCgorilla integrates a wide range of techniques from architectures and languages to applications, one-sided design approach is not always useful. HCgorilla needs more complicated strategy, hardware/software (H/S) co-design. The software support of HCgorilla is composed of a Java interface and parallelizing compilers. They are installed in servers to reduce the load and increase the performance of HCgorilla-embedded clients. Since compilers are the essence of software's responsibility, we focus in this article on our recent results about the design, specification, and prototyping of parallelizing compilers for HCgorilla. The compilers are composed of the multicore compiler and LIW compiler. They are specified to abstract parallelism from executable serial codes or the Java interface output and output the codes executable in parallel by HCgorilla. The prototyping compilers are written in Java and evaluated in case of arithmetic media codes compared with a hand compiler. Although the evaluation is primitive, it shows the reasonability of the compilers.