Thermal Simulation and Power Map Modeling Sensitivity Study for Chipset Silicon

摘要

This paper describes the thermal characterization and power map methodology on chipset silicon die. The on-die power map affects the overall thermal gradient and heat spreading effect from the die to the package top, which in turns drives the cooling requirements needed to meet package cooling target. This paper demonstrates the power-thermal simulation with different power map resolution and examines its effects on the hot spot on the die.