Dual-rail multiple-valued current-mode VLSI with biasing currentsources

摘要

A new current mirror with a biasing current source is proposed forhigh-performance arithmetic VLSI systems. The delay for the currentmirror is inversely proportional to the input current. The use of abiasing current source makes the input current of the current mirrorincreased, which results in smaller switching delay. As a typicalexample of the proposed dual-rail multiple-valued current mode (MVCM)circuit, a radix-2 signed-digit full adder is designed by using a0.35-μm CMOS technology. Its performance is superior to that ofcorresponding MVCM circuits without biasing current sources