Modeling and Design of n+1 Current Shareas Disturbance Rejection for DC-DC Converters

摘要

In this paper, modeling of single wire current sharing implementation for DC-DCConverters is furnished as an add-on feature and it is fashioned as Disturbance Rejection in thecontrol scheme. Steps of unique and novel implementation of adding an n+1 current sharefeature to an existing design implementation of a single output DC-DC Converter are examinedin pedagogical and didactic values for readers and the combined model of dynamic control isderived, which treats the deviations of n+1 current share as disturbance rejection, whichfacilitates predicting the current share control system performance within an already establisheddesign of a host DC-DC Converter. The paper also presents a brief comparison of earliercomparable current share implementations in the literature, and highlights advantages of theproposed scheme over the earlier implementations.