Design Aids for the Simulation of Bipolar Gate Arrays

摘要

This paper describes a system of design aids which are used in the modeling and simulation of bipolar gate arrays for applications where the delays cannot be neglected. Prewired function blocks composed of circuit elements such as transistors, resistors, diodes, etc. are automatically converted to logic gate descriptions. The transistor level model of a function block is analyzed with a circuit simulation program to obtain delay values for the gate level model. The gate equivalent circuits and the delay values produced by these methods provide accurate digital simulation of bipolar gate arrays.