Fault tolerant design validation through laser fault injectionspace-based computing systems

摘要

Space based real time applications for high end computing systemsrequire that the system not only be extremely reliable but also tolerantto a hierarchy of adverse events generally referred to as faults. At theCenter for Microelectronics Research (CMR) of the University of SouthFlorida (USF), laser soft fault injection for fault tolerant designvalidation research has been carried out. The technique is based onusing a thoroughly controlled laser beam into a Very Large ScaleIntegrated Circuit (VLSIC) which is a component of an operating computercapable of detecting, logging, and correcting a transient fault and thenproceeding with its operation. The test vehicle is a 32-bit processordesigned for 100% microcircuit fault coverage in addition to concurrenterror detection, reporting, logging, and recovery. Of primary interestis the recovery from transient Single Event Upsets (SEU's) caused byhigh energy particles. The technique has been demonstrated with twodifferent system level series of tests. The first test routine involvedthe verification of an initial set up and demo test performed at CMR onan early version of the computer which was designed just to verify thatthe computer detected and logged a hardware error in the register fileof the Central Processing Unit (CPU). A second series of test weredesigned to observe the incrementing of the error count register and thecorrelation to the number of laser pulses applied. The complete testsetup and test validation strategies including samples of test resultare presented