In innovation theory, it is widely accepted that complexity constrains the internationalization of innovation. This is based on the well-established proposition that physical proximity is advantageous for innovative activities that involve highly complex technological knowledge. In a frequently quoted article (1991), the late Keith Pavitt and his co-author Pari Patel use patent data to demonstrate that innovative activities of the world's largest firms are among the least internationalized of their functions. They argue that firms tend to concentrate innovation in their home country, in order to facilitate the exchange of complex knowledge. Hence, complexity explains why innovation remains an important case of "non-globalization". But chip design, a process that creates the greatest value in the electronics industry and that requires highly complex knowledge, does not confirm this proposition. Over the last few years, a heavy concentration in a few centers of excellence (mainly in the US, but also in Europe and Japan), has given way to a growing organizational and geographical mobility. Of particular importance has been a massive dispersion of chip design to leading Asian electronics exporting countries. To explain why chip design is moving to Asia, the paper draws on interviews with 60 companies and 15 research institutions that are doing leading-edge chip design in Asia. The sample contained system companies; integrated device manufacturers (IDMs); providers of electronic manufacturing services (EMSs) and design services (the so-called ODMs, or "original-design-manufacturers") ; "fabless" chip design houses; "chipless" licensors of "silicon intellectual properties" (SIPs); chip contract manufacturers ("foundries"); vendors of electronic design automation (EDA) tools; chip packaging and testing companies; and design implementation service providers. The paper documents substantial progress in the complexity of Asian chip design projects. I argue that a combination of "pull", "policy", "push" and "enabling" factors are now coming together, creating a virtuous circle of forces that strengthen chip design capabilities in Asia. While the first two factors explain what attracts design to particular locations, "push" and "enabling" factors highlight fundamental transformations in the methodology and organization of chip design. "Pull" factors comprise supply-oriented forces, especially the lower cost of employing a chip design engineer in Asia, which is typically between 10% and 20% of the cost in Silicon Valley. Asia graduates substantially more electronic engineers than the US. Asian designers are trained using the latest tools and methodologies and are less resistant to "design automation" than designers in Silicon Valley. They are focused on cost innovation rather than breakthrough designs, and hence can easier adjust to the pervasive cost reduction pressures in the IC industry. In addition, wafer fabrication and chip assembly have migrated largely to Korea, Greater China and Singapore. Equally important is the sheer size of Asia's markets for IT hardware and services, with China as the main prize. Global firms emphasize the need to relocate design to be close to the rapidly growing and increasingly sophisticated Asian markets for communications, computing and digital consumer equipment, to be able to interact with Asia's lead users of novel or enhanced products or services. And both global and Asian firms emphasize that "policy factors" played a powerful catalytic role in providing incentives, training, infrastructure, and support industries. But to get to the root causes behind the relocation of chip design to Asia, I examine "push" factors, i. e. changes in design methodology ("system-on-chip design", or SoC) and organization ("vertical specialization" within global design networks, or GDNs). The paper explores how these changes have pushed vertical specialization within GDNs deeper and deeper into the design value chain,
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