首页> 外文会议>Multiple-Valued Logic, 2003. Proceedings. 33rd International Symposium on >A technique for logic design of voltage-mode pass transistor based multi-valued multiple-output logic circuits
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A technique for logic design of voltage-mode pass transistor based multi-valued multiple-output logic circuits

机译:基于电压模式传输晶体管的多值多输出逻辑电路的逻辑设计技术

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An approach for designing multi-valued logic circuits is proposed in this paper. We also describe a systematic method for implementing a set of binary logic functions, as multi-valued logic functions, and the heuristic algorithms for different stages of the design process are provided along with it. Experimental results are included for a number of benchmark functions and the proposed method has been found to be quite efficient, in terms of number of transistors, in the implementation of some of these functions. The proposed circuits are essentially voltage-mode circuits with multi-valued outputs and in the case of implementing multiple-output binary logic functions this approach produces circuits with reduced number of output pins. The circuits described here are also suitable to be implemented in VLSI technology since they are composed of simple enhancement/depletion mode MOS transistors and pass transistors.
机译:本文提出了一种设计多值逻辑电路的方法。我们还描述了一种用于实现一组二进制逻辑函数(如多值逻辑函数)的系统方法,并且还提供了针对设计过程不同阶段的启发式算法。包括了许多基准功能的实验结果,并且发现在某些功能的实现方面,就晶体管的数量而言,所提出的方法是相当有效的。所提出的电路本质上是具有多值输出的电压模式电路,并且在实现多输出二进制逻辑功能的情况下,这种方法产生的输出引脚数量减少了。由于此处描述的电路由简单的增强/耗尽型MOS晶体管和传输晶体管组成,因此也适用于VLSI技术。

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