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Computer-aided inspection of some design rules of integrated circuit layers

机译:集成电路层某些设计规则的计算机辅助检查

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摘要

The visual inspection algorithms for verification of industrial design rules of integrated circuits are proposed. The algorithms include segmentation of images of layout with subsequent extraction of typical patterns on these images for defects localization. The unique feature of the technology is that the inspection of the design technological rules is performed at different stages of processing. Thus a time-consuming procedure of image matching with the purpose of localization of defects is performed only for some images from the whole image set. The inspection algorithms are included in the system of metallization layers processing, which is applied both for layout reconstruction of integrated circuits and for the inspection of its manufacture.
机译:提出了用于检验集成电路工业设计规则的视觉检查算法。该算法包括对布局图像进行分割,随后在这些图像上提取典型图案以进行缺陷定位。该技术的独特之处在于,对设计技术规则的检查是在处理的不同阶段执行的。因此,仅对来自整个图像集中的一些图像执行耗时的,以缺陷定位为目的的图像匹配过程。检测算法包含在金属化层处理系统中,该系统既可用于集成电路的布局重建,也可用于其制造的检查。

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