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Nonintrusive debugging using the JTAG interface of FPGA-based prototypes

机译:使用基于FPGA的原型的JTAG接口进行非侵入式调试

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The IEEE Std. 1149.1, also known as JTAG, defines a serial interface to access test-dedicated logic embedded in integrated circuits, although it is also being used as an FPGA programming interface. This paper makes an analysis of the possibilities of reusing this infrastructure in debugging applications implemented in FPGAs while in the prototype validation phase, with emphasis on nonintrusive methods. Commercially available FPGAs may offer from basic JTAG implementations, to complex ones. Depending on these features, the paper discusses different methods for monitoring, tracing, debugging and profiling the execution of programs running on a microprocessor. Some of these methods require ad-hoc modules to be inserted, like embedded in-circuit emulators or trace-capable blocks. A tool is presented that demonstrates the possibility of automatically inserting and connecting debug-oriented blocks, and controlling them through the JTAG interface. Application examples are provided, showing the results of the use of the tool with some industrial and academic microprocessor system implementations.
机译:IEEE标准1149.1,也称为JTAG,定义了一个串行接口来访问嵌入在集成电路中的测试专用逻辑,尽管它也被用作FPGA编程接口。本文分析了在原型验证阶段,在以FPGA实现的调试应用中重用此基础架构的可能性,重点是非侵入性方法。商业上可用的FPGA可以提供从基本JTAG实施到复杂的FPGA的实施。根据这些功能,本文讨论了监视,跟踪,调试和分析在微处理器上运行的程序的执行情况的不同方法。其中一些方法需要插入临时模块,例如嵌入式在线仿真器或具有跟踪功能的模块。提出了一个工具,该工具演示了自动插入和连接面向调试的块并通过JTAG接口控制它们的可能性。提供了应用示例,显示了该工具在某些工业和学术微处理器系统实现中使用的结果。

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