A trench-isolated power BiCMOS process with complementary high performance vertical bipolars

摘要

A new process for mixed-signal and power management applications is introduced. The process architecture is designed to achieve high V{sub}A, high f{sub}T complementary 24V bipolar devices coupled to 0.5 μm CMOS and 24V power MOS. For optimum performance and die size the process uses 1 μm wide poly-filled trench isolation.