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A 60 GHz integrated sub-harmonic receiver MMIC

机译:60 GHz集成次谐波接收器MMIC

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摘要

We present a 60 GHz integrated sub-harmonic receiver fabricated using the TRW 0.15 /spl mu/m gate length GaAs pHEMT foundry process. The receiver MMIC consists of a four stage LNA, a sub-harmonic diode mixer and a single stage LO buffer amplifier. The chip size is 5.8 mm/spl times/2.2 mm. The receiver MMIC has been integrated into a coaxial package for system evaluation. The packaged receiver module has a measured conversion gain of /spl ges/8 dB across the 58 GHz to 67 GHz frequency band and a typical noise figure of 5.8 dB. The use of a sub-harmonic mixer allows LO operation over the 21 to 27 GHz frequency range at a low LO drive level of -5 dBm and eliminates the need for high cost mm-wave sources. This is believed to be the first single chip V-band receiver manufactured using a commercially available, high yield, production foundry process. This paper describes the design, packaging and measured performance of the integrated sub-harmonic receiver MMIC.
机译:我们介绍了使用TRW 0.15 / spl mu / m栅长GaAs pHEMT铸造工艺制造的60 GHz集成次谐波接收器。接收器MMIC由四级LNA,次谐波二极管混频器和单级LO缓冲放大器组成。芯片尺寸为5.8毫米/ spl倍/2.2毫米。接收器MMIC已集成到同轴封装中,用于系统评估。封装的接收器模块在58 GHz至67 GHz频带上测得的转换增益为/ spl ges / 8 dB,典型噪声系数为5.8 dB。使用亚谐波混频器可以在21到27 GHz频率范围内以低-5 dBm的本振驱动水平进行本振工作,并且无需使用成本高昂的毫米波源。据信这是使用市售的高产量生产铸造工艺制造的第一款单芯片V波段接收器。本文介绍了集成次谐波接收器MMIC的设计,包装和测量性能。

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