首页> 外文会议>Proceedings of the 2000 IEEE International Symposium on Intelligent Control, 2000, 2000 >Energy-delay efficient data storage and transfer architectures:circuit technology versus design methodology solutions
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Energy-delay efficient data storage and transfer architectures:circuit technology versus design methodology solutions

机译:节能高效的数据存储和传输架构:电路技术与设计方法解决方案

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Both in custom and programmable instruction-set processors fordata-dominated multi-media applications, many of the architecturecomponents are intended to solve the data transfer and storage issues.Recent experiments at several locations have clearly demonstrated thatdue to this fact, the main power (and largely also area) cost issituated in the memory units and the communication hardware. In thispaper, the main reasons for this problem will be reviewed and aperspective will be provided on the expected near-future evolution. Itwill be shown that the circuit and process technology advances have beenvery significant in the past decade. Still, these are not sufficient tofully solve this power and area bottle-neck which has been created inthe same period. Therefore, several possible design methodology remedieswill be proposed for this critical design issue, with emphasis oneffective system-level memory management methodologies. These promisevery large savings on energy-delay also on area for multi-mediaapplications, while still meeting the real-time constraints
机译:在定制和可编程指令集处理器中, 以数据为主导的多媒体应用程序,许多架构 组件旨在解决数据传输和存储问题。 最近在几个地方进行的实验清楚地表明, 由于这个事实,主要的电力(主要是面积)成本为 位于存储单元和通信硬件中。在这个 论文中,将对此问题的主要原因进行回顾并提出 将提供有关预期的近期发展的观点。它 将显示出电路和工艺技术的进步 在过去十年中非常重要。不过,这些还不足以 完全解决在 同一时期。因此,几种可能的设计方法论补救措施 将针对此关键设计问题提出建议,重点是 有效的系统级内存管理方法。这些承诺 节省大量的能源,也节省了多媒体的面积 应用程序,同时仍然满足实时约束

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