Halftone biasing OPC technology: an approach for achieving fine bias control on raster-scan systems

摘要

Abstract: As the semiconductor roadmap continues to requireimaging of smaller features on wafers, we continue toexplore new approaches in OPC strategies to enhanceexisting technology. Advanced reticle design, intendedfor printing sub-wavelength features, requires thesupport of very fine-increment biases onsemi-densely-pitched lines, where the CD correctionrequires only a fraction of the spot size of an e-beamsystem. Halftone biasing, a new OPC strategy, has beenproposed to support these biases on a raster-scane-beam system without the need for a reduced addressunit and the consequent write time penalty. Themanufacturability and inspectability of halftone-biasedlines are explored, using an OPC characterizationreticle. Pattern fidelity is examined using bothoptical and SEM tools. Printed DUV resist line edgeprofiles are compared for both halftone andnon-halftone feature edges. Halftone biasing wasapplied to an SRAM-type simulation reticle, to examineits impact on data volume, write time reduction, andprinting performance. !1