Enhancing the PCI bus to support real-time streams

摘要

In this paper we present an access scheduling scheme for real-time streams (RTS) over the peripheral component interconnect (PCI) bus. We derive a bus model based on the rate monotonic scheduling (RMS) algorithm that guarantees the timing quality of service (QoS) for real-time streams over the PCI bus. The proposed model is valid for constant-bit-rate (CBR) as well as for variable-bit-rate (VBR) streams. We define the effective bus utilization (EBU) as the worst case bus utilization and we determine the value of the internal latency timer (ILT) that minimizes EBU. Finally, we present some simulation results to demonstrate the practicality of the proposed scheme.