By tailoring a compiler tree-parsing tool for datapath module mapping, we produce good quality results for datapath synthesis in very fast run time. Rather than flattening the design to gates, we preserve the datapath structure; this allows exploitation of specialized datapath features in FPGAs, retains regularity, and also results in a smaller problem size. To further achive high mapping speed, we formulate the problem as tree covering and solve it efficiently with a linear-time dynamic programming algorithm. In a novel extension to the tree-covering algorithm, we perform module placement simultaneously with the mapping, still in linear time. Integrating placement has the potential to increase the quality of the result since we can optimize total delay including routing delays.
To our knowledge this is the first effort to leverage a grammar-based tree covering tool for datapath module mapping. Further, it is the first work to integrate simultaneous placement with module mapping in a waythat preserves linear time complexity.
通过为数据路径模块映射量身定制编译器树分析工具,我们可以在非常快的运行时间内为数据路径综合生成高质量的结果。我们保留了数据路径结构,而不是将设计压平到门。这样就可以利用FPGA中的专用数据路径功能,保持规则性,并减小问题的规模。为了实现更高的映射速度,我们将问题表示为树覆盖,并使用线性时间动态规划算法有效解决。在对树覆盖算法的新颖扩展中,我们在线性时间内仍然在映射的同时执行模块放置。集成布局可以提高结果质量,因为我们可以优化包括布线延迟在内的总延迟。 P>
据我们所知,这是首次利用基于语法的树覆盖工具进行数据路径模块映射。此外,这是将同时放置与模块映射相集成以保持线性时间复杂性的第一项工作。 P>
机译:ALMmap:具有自适应逻辑模块的FPGA的技术映射
机译:FPGA禁区约束下的模块放置技术
机译:Maple-opt:面向FPGA的面向性能的同步技术映射,布局和全局路由算法
机译:数据路径模块和FSM在基于LUT的FPGA中的直接映射系统
机译:架构优化和综合工具可提高能效并更快地完成FPGA的设计封闭。
机译:用于直接传感器到FPGA接口的智能捕获模块
机译:FPGA中数据路径的快速模块映射和放置