Modeling and scaling of a-Si:H and poly-Si thin film transistors

摘要

We have developed analytic SPICE models for hydrogenated amorphous silicon (a-Si:H) and polysilicon (poly-Si) thinfilm transistors (TFTs) which accurately model all regimes of operation,are temperature dependent to 150 deg C,and scale with device dimensions.These models have bene presented in [1,2].In this work,we compare the current-voltage characteiristics predicted by our models with the measured characterisitcs from TFTs fabricated at different foundries.We compare the extracted device parameters in order to evaluate the robustnessof our models and to determine a suitable default parameter set.We also use the models to examine the effects of device scaling for short channel TFTs.The models can be accuessed usifng the circuit simulator AIM-Spice [3],which is available at http:// nina.ecse.rpi.edu/aimspice.