【24h】

A fast FPGA based coprocessor supporting hard real-time search

机译:基于FPGA的快速协处理器,支持硬实时搜索

获取原文

摘要

In their work on dual port memories S. Cittolin and A. Fucci et al. (1995) describe a design approach for programmable message driven multi port memories (DPMs) with a high throughput (100 MByte/s). The design for nearly sequential requests (typical for some data acquisition systems (DAC)) causes accessing problems for more general applications. Considering hard real time requirements of DAC systems, the paper proposes two hardware implemented (based on FPGA technology) coprocessor architectures for searching in the file descriptor table of the dual port memory and compares them according to implementation costs and performance. Additionally the used searching strategy was implemented on the TI DSP C40 and the performance was compared to the hardware implementation. The examined hardware strategy is independent from the rest of the dual port memory and can therefore also be integrated into other computer systems as a generic searching coprocessor.
机译:在他们对双端口存储器的研究中,S。Cittolin和A. Fucci等人。 (1995年)描述了一种具有高吞吐量(100 MByte / s)的可编程消息驱动的多端口存储器(DPM)的设计方法。几乎连续的请求(对于某些数据采集系统(DAC)而言通常是这样)的设计会导致访问问题,从而影响更一般的应用程序。考虑到DAC系统的实时性要求,本文提出了两种基于FPGA技术的硬件实现协处理器架构,用于在双端口存储器的文件描述符表中进行搜索,并根据实现成本和性能进行比较。另外,在TI DSP C40上实现了所使用的搜索策略,并将性能与硬件实现进行了比较。所检查的硬件策略独立于双端口存储器的其余部分,因此也可以作为通用搜索协处理器集成到其他计算机系统中。

著录项

相似文献

  • 外文文献
  • 中文文献
  • 专利
获取原文

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号