Design of very low phase noise MMIC reproducible X band DRO

摘要

This paper describes the design, building and measurement of a low-phase noise MMIC DRO using a new design method based on the open loop concept and state-of-the-art CAD tools. This DRO, whose setting is very easy, has an oscillation frequency of 10 GHz and an output power of 15 dBm. Its reproducible phase noise of -105 dBc/Hz at 10 KHz from the carrier is the best result published for an MMIC FET DRO.