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New VLSI architecture for velocity computation of multiple moving objects in images

机译:新的VLSI架构,用于图像中多个运动物体的速度计算

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Abstract: This paper presents a new systolic realization of the Fourier-based method for motion detection and velocity computation of multiple moving objects in images. In the architecture, the 2D discrete Fourier transform is computed via the 2D discrete Hartley transform (DHT) that involves only real valued arithmetic. The 2D DHT is realized based on the row-column decomposition without matrix transposition problems. The systolic system possesses the desirable features of regularity, modularity, and concurrency for VLSI implementation. It has a utilization efficiency of Min(N, M)/Max(N,M) $MUL 100 percent and a throughput rate of one velocity estimation per T $MUL Max(N,M) cycles, where N and M are the number of pixels of an image in the x- and y- directions, respectively, and T is the number of frames in the image sequence.!13
机译:摘要:本文提出了一种新的收缩系统对基于傅立叶的运动检测和速度计算图像中的多个移动物体的速度计算。在架构中,通过仅涉及真实值的算法的2D离散Hartley变换(DHT)来计算2D离散傅里叶变换。基于行列分解来实现2D DHT,而不存在矩阵换位问题。收缩系统具有规律性,模块化和并发性的理想特征,用于VLSI实现。它具有Min(n,m)/ max(n,m)$ mul 100%的利用率,每次t $ mul max(n,m)循环的一个速度估计的吞吐率率,其中n和m是数字分别在x和y方向上的图像的像素,并且t是图像序列中的帧数。!13

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