An effective fault-tolerant technique for circular butterflyparallel systems

摘要

The butterfly parallel system has a regular and simpleinterconnection pattern, making it suitable for VLSI/WSI implementation.The authors propose an effective fault-tolerant technique for thecircular butterfly parallel system to ensure its rigid full butterflystructure even in the presence of failures. A resulting butterfly systemwith L levels involves (1/log₂L)% spare PEsand roughly 50% additional links. Reconfiguration in response fault iseasy and can be performed in a distributed manner. The analytic resultsshow that the proposed design exhibits significantly improvedreliability