A DSP realization of a CELP testbench

摘要

A testbench which enables a software implementation of different code-excited linear predictive (CELP) coder configurations in a simple and modular way, is presented as a research and development tool. It permits a flexible simulation process while using the actual hardware and software resources which constitute a real system. Its behaviour is consequently close to that of the final system envisaged. This testbench has been developed using the TMS320C30 digital signal processor and has been programmed in a modular way in C language. A CELP coder using two different codeword generation methods (the LBG algorithm and the Fuzzy-LVQ partitioning algorithm) have been tested using the proposed testbench.