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A simplified low voltage smart power technology

机译:简化的低压智能电源技术

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摘要

A self-isolated smart power process using only eight photolithographic steps has been developed. It allows the fabrication of high-voltage VDMOS and p-channel MOS transistors, a low-voltage CMOS logic, n-p-n bipolar transistors, diodes, Zeners, and high value capacitors. The VDMOS device is fabricated by a double diffused process and the same diffusion is used for the n-channel transistor well and for the VDMOS body. A process monitor chip has been fabricated and the different devices have been measured, showing the feasibility of such a technology and the excellent agreement with previously obtained simulation results.
机译:已经开发出仅使用八个光刻步骤的自隔离式智能电源工艺。它允许制造高压VDMOS和p沟道MOS晶体管,低压CMOS逻辑,n-p-n双极晶体管,二极管,齐纳二极管和高价值电容器。 VDMOS器件是通过双扩散工艺制造的,并且相同的扩散用于n沟道晶体管阱和VDMOS主体。已经制造了过程监控器芯片,并测量了不同的器件,这表明了这种技术的可行性,并且与先前获得的仿真结果非常吻合。

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