Process monitoring oriented IC testing

摘要

The authors proposed the use of functional testing for the extraction of IC manufacturing defect characteristics. It is demonstrated, using an SRAM (static random-access memory) example, that such extraction is feasible if an appropriate methodology for the interpretation of testing results is applied. The methodology allows for the extraction of information about process disturbances and abnormalities causing IC malfunctions. In this methodology the Monte Carlo fault modeling technique, combined with circuit simulation, was applied to build a defect fault vocabulary. The simulation experiment conducted by using this methodology demonstrated that a spectrum of signatures can be created to represent process disturbances. It was also shown that such a spectrum of signatures can be sensitive enough to changes in the defect densities.