The implementation of a 26-lead small-outline J-lead (SOJ) integrated-circuit surface-solder plastic package is described. A plastic SOJ package for this chip design which, by conventional wire bond methods, is neither feasible nor manufacturable is used. The packaging method, developed in parallel with device design, takes advantage of unconventional chip input/output (I/O) pad placement to produce an internal package construction called area-wire-bond (A-wire) which complements mechanical, thermal, and electrical device performance functions. Data gathered during the qualification of the manufacturing lines have shown that A-wire packages consistently exceed established IBM reliability criteria for semiconductor packages.
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