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A Soft Error Tolerance Estimation Method for Sequential Circuits

机译:顺序电路的软误差容差估计方法

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摘要

In advanced technology, soft error tolerance of VLSIs decreases. Soft errors might cause VLSIs to failure. However, there is no exact method to estimate soft error tolerance for sequential circuits of VLSIs. We propose an exact method to estimate soft error tolerance for sequential circuits. The failure due to soft errors in sequential circuits is defined by using the modified product machine. The behavior of the modified product machine is analyzed using Markov model strictly. We also propose two acceleration techniques to apply the exact method to larger scale circuits. Two acceleration techniques reduce the number of variables of simultaneous linear equations. We apply the proposed method to ISCAS'89 and MCNC benchmark circuits and estimate soft error tolerance for sequential circuits. Experimental results shows that two acceleration techniques reduce up to 10 times from its original execution time.
机译:在先进的技术中,VLSI的软错误容差减少。软错误可能会导致VLSIS失败。但是,没有精确的方法来估计VLSI的顺序电路的软误差容限。我们提出了一种精确的方法来估计顺序电路的软误差容差。由于顺序电路中的软误差导致的故障是通过使用改进的产品机来定义的。严格使用Markov模型分析改进的产品机器的行为。我们还提出了两个加速技术,以将精确的方法应用于更大的刻度电路。两个加速技术减少了同时线性方程的变量的数量。我们将建议的方法应用于ISCAS'89和MCNC基准电路,并估算顺序电路的软误差容差。实验结果表明,两种加速技术从原始执行时间减少了最多10次。

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