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IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems

召开年：2020
召开地：Frascati(IT)
出版时间：-

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1.A scrubbing scheduling approach for reliable FPGA multicore processors with real-time constraints

机译：具有实时约束的可靠FPGA多核处理器的擦洗调度方法
- 作者：Mihalis Psarakis;Aitzan Sari
- 会议名称：《IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems》 | 2017年
2.High Performance Fault Tolerance Through Predictive Instruction Re-Execution

机译：通过预测指令重新执行高性能容错
- 作者：Jyothish Soman;Timothy M. Jones
- 会议名称：《IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems》 | 2017年
3.Kernel Vulnerability Factor and Efficient Hardening for Histogram of Oriented Gradients

机译：面向梯度直方图的内核脆弱因素和高效硬化
- 作者：Lucas Weigel;Fernando Fernandes;Philippe Navaux;Paolo Rech
- 会议名称：《IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems》 | 2017年
4.Early estimation of aging in the design flow of integrated circuits through a programmable hardware module

机译：通过可编程硬件模块的集成电路设计流程早期估计
- 作者：Chiara Sandionigi;Mauricio Altieri;Olivier Heron
- 会议名称：《IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems》 | 2017年
5.Lifetime Reliability Characterization of N/MEMS Used in Power Gating of Digital Integrated Circuits

机译：数字集成电路电源门控的N / MEM的寿命可靠性表征
- 作者：Haider Alrudainy;Rishad Shafik;Andrey Mokhov;Alex Yakovlev
- 会议名称：《IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems》 | 2017年
6.Investigating the Effects of Process Variations and System Workloads on Endurance of Non-Volatile Caches

机译：调查过程变化和系统工作量对非易失性高速缓存的耐久性的影响
- 作者：Amir Mahdi Hosseini Monazzah;Hamed Farbeh;Seyed Ghassem Miremadi
- 会议名称：《IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems》 | 2017年
7.Reliability-aware Synthesis and Fault Test of Fully Programmable Valve Arrays (FPVAs)

机译：完全可编程阀阵列（FPVA）的可靠性感知合成和故障测试
- 作者：Bing Li;Ulf Schlichtmann
- 会议名称：《IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems》 | 2017年
8.High-energy Neutrons Characterization of a Safety Critical Computing System

机译：高能量中子的表征安全关键计算系统
- 作者：Andrea Fedi;Marco Ottavi;Gianluca Furano;Antimo Bruno;Roberto Senesi;Carla Andreani;Carlo Cazzaniga
- 会议名称：《IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems》 | 2017年
9.Hardware and Software Innovations in Energy-Efficient System-Reliability Monitoring

机译：高节能系统可靠性监测中的硬件和软件创新
- 作者：Vasileios Tenentes;Charles Leech;Graeme M. Bragg;Geoff Merrett;Bashir M. Al-Hashimi;Hussam Amrouch;Jorg Henkel;Shidhartha Das
- 会议名称：《IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems》 | 2017年
10.A Defective Level Monitor of Open Defects in 3D ICs with a Comparator of Offset Cancellation Type

机译：偏移消除型比较器的3D IC中的开放缺陷差异监视
- 作者：Michiya Kanda;Masaki Hashizume;Hiroyuki Yotsuyanagi;Shyue-Kung Lu
- 会议名称：《IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems》 | 2017年
- Electrical interconnect test;
- 3D stacked IC;
- Open defect;
- Defecivet level monitor;
- Comparator;
11.Low Cost Error Monitoring for Improved Maintainability of IoT Applications

机译：降低成本错误监控，以提高IOT应用程序的可维护性
- 作者：Mauricio D. Gutierrez;Vasileios Tenentes;Tom J. Kazmierski;Daniele Rossi
- 会议名称：《IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems》 | 2017年
12.Improving Test Compression with Multiple-Polynomial LFSRs

机译：用多个多项式LFSR改善测试压缩
- 作者：Yu-Wei Lee;Nur A. Touba
- 会议名称：《IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems》 | 2017年
13.On-Line Software-based Self-Test for ECC of Embedded RAM Memories

机译：基于在线软件的嵌入式RAM存储器的ECC自检
- 作者：M. Restifo;P. Bernardi;S. De Luca;A. Sansonetti
- 会议名称：《IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems》 | 2017年
- ECC logic;
- Software-Based Self-Test;
- Latent faults;
14.Reconfigurable TAP Controllers with Embedded Compression for Large Test Data Volume

机译：具有嵌入式压缩的可重新配置的抽头控制器，用于大型测试数据量
- 作者：Sebastian Huhn;Stephan Eggersgluss;Rolf Drechsler
- 会议名称：《IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems》 | 2017年
15.CAL: Exploring Cost, Accuracy, and Latency in Approximate and Speculative Adder Design

机译：CAL：探索近似和投机加法器设计中的成本，准确性和延迟
- 作者：Sina Boroumand;Hadi P. Afshar;Philip Brisk;Siamak Mohammadi
- 会议名称：《IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems》 | 2017年
16.Region Based Containers - A new paradigm for the analysis of Fault Tolerant Networks

机译：基于区域的容器 - 用于分析容错网络的新范式
- 作者：Prashant D. Joshi;D. Frank Hsu;Arunabha Sen;Said Hamdioui;Koen Bertels
- 会议名称：《IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems》 | 2017年
- Fault Tolerant Networks;
- Graph Containers;
- Region Based Connectivity;
- Diameter degradation;
- Extended Line Graphs;
17.Lifetime Memory Reliability Data from the Field

机译：来自现场的终身内存可靠性数据
- 作者：Taniya Siddiqua;Vilas Sridharan;Steven E. Raasch;Nathan DeBardeleben;Kurt B. Ferreira;Scott Levy;Elisabeth Baseman;Qiang Guan
- 会议名称：《IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems》 | 2017年
18.Realizing Strong PUF from Weak PUF via Neural Computing

机译：通过神经计算实现弱PUF强烈的PUF
- 作者：Leandro Santiago;Vinay C. Patil;Charles B. Prado;Tiago A. O. Alves;Leandro A. J. Marzulo;Felipe M. G. Franca;Sandip Kundu
- 会议名称：《IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems》 | 2017年
19.Towards SRAM Leakage Power Minimization by Aggressive Standby Voltage Scaling - Experiments on 40nm Test Chips

机译：通过激进备用电压缩放 - 40nm试验芯片的实验，实现SRAM泄漏功率最小化
- 作者：Xin Fan;Jan Stuijt;Tobias Gemmeke
- 会议名称：《IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems》 | 2017年
- SRAM;
- Leakage current;
- Voltage scaling;
- ECC;
20.Unintrusive Aging Analysis based on Offline Learning

机译：基于离线学习的无模年龄分析
- 作者：Frank Sill Torres;Pedro Fausto Rodrigues Leite Jr.;Rolf Drechsler
- 会议名称：《IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems》 | 2017年
- Aging;
- Reliability;
- Remaining Useful Lifetime;
- NBTI;
- TDDB;
21.On the Optimization of SBST Test Program Compaction

机译：关于SBST测试程序压缩的优化
- 作者：R. Cantoro;E. Sanchez;M. Sonza Reorda;G. Squillero;E. Valea
- 会议名称：《IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems》 | 2017年
- Test program;
- SBST;
- Execution time;
- NOP instructions;
22.REMORA: A Hybrid Low-Cost Soft-Error Reliable Fault Tolerant Architecture

机译：REMORA：混合低成本软误差可靠的容错架构
- 作者：Shoba Gopalakrishnan;Virendra Singh
- 会议名称：《IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems》 | 2017年
23.A Resilient Scheduler for Dataflow Execution

机译：DataFlow执行的弹性调度程序
- 作者：Tiago A. O. Alves;Sandip Kundu;Leandro A. J. Marzulo;Felipe M. G. Franca
- 会议名称：《IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems》 | 2017年
- Dataflow Execution;
- High Performance Computing;
- Error Detection and Recovery;
24.Exploring Soft Errors (SEUs) with Digital Imager Pixels ranging from 7 to 1.3 μm

机译：使用数字成像器像素探索软误差（SEU），范围为7至1.3μm
- 作者：Glenn H. Chapman;Parham Purbakht;Peter Le;Israel Koren;Zahava Koren
- 会议名称：《IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems》 | 2017年
- Imager defects;
- Hot pixel;
- SEU;
- APS;
- ISO;
25.Online Fault Detection in Reversible Logic

机译：可逆逻辑中的在线故障检测
- 作者：Nayeem N.M.;Rice J.E.
- 会议名称：《IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems》 | 2011年
- Toffoli gates;
- online testability;
- reversible logic;
26.Debug Aware AXI-based Network Interface

机译：调试意识的基于AXI的网络接口
- 作者：Neishaburi M.H.;Zilic Zeljko
- 会议名称：《IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems》 | 2011年
- Debug;
- Network Interface;
- Network on Chip;
27.Predicting Pixel Defect Rates Based on Image Sensor Parameters

机译：基于图像传感器参数预测像素缺陷率
- 作者：Chapman Glenn H.;Leung Jenny;Namburete Ana;Koren Israel;Koren Zahava
- 会议名称：《IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems》 | 2011年
- APS;
- CMOS image sensor;
- active pixel sensor;
- defect detection;
- defect rate prediction;
- hot pixel;
- imager defects;
28.Route-Aware Task Mapping Method for Fault-Tolerant 2D-Mesh Network-on-Chips

机译：用于容错2D-Mesh网络上的路由感知任务映射方法
- 作者：Kutami Hiroshi;Fukushima Yusuke;Fukushi Masaru;Yairi Ikuko Eguchi;Hattori Takeshi
- 会议名称：《IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems》 | 2011年
29.A Practical Approach to Single Event Transients Analysis for Highly Complex Designs

机译：用于高度复杂设计的单事件瞬变分析的实用方法
- 作者：Alexandrescu Dan;Costenaro Enrico;Nicolaidis Michael
- 会议名称：《IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems》 | 2011年
- Single Event Effects;
- Single Event Transient;
- accelerated fault simulation;
- fault propagation;
- static fault analysis;
30.Hierarchical Embedded Logic Analyzer for Accurate Root-Cause Analysis

机译：分层嵌入式逻辑分析仪，用于精确根本原因分析
- 作者：Neishaburi M.H.;Zilic Zeljko
- 会议名称：《IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems》 | 2011年
- Assertion checker;
- Hierarchical State Machine;
- Post-silicon debug;
31.On the Feasibility of Built-In Self Repair for Logic Circuits

机译：论逻辑电路内置自修复的可行性
- 作者：Koal Tobias;Scheit Daniel;Schamp;#x0F6;lzel Mario;Vierhaus Heinrich T.
- 会议名称：《IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems》 | 2011年
- dependability;
- self repair;
32.Creating Defect Tolerance in Microfluidic Capacitive/Photonic Biosensors

机译：在微流体电容/光子生物传感器中产生缺陷耐受性
- 作者：Chapman Glenn H.;Gray Bonnie L.;Jain Vijay K.
- 会议名称：《IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems》 | 2011年
33.NBTI Monitoring and Design for Reliability in Nanoscale Circuits

机译：NBTI监控和纳米电路可靠性的设计
- 作者：Khan Seyab;Haron Nor Zaidi;Hamdioui Said;Catthoor Francky
- 会议名称：《IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems》 | 2011年
34.A Fault Tolerant Hierarchical Network on Chip Router Architecture

机译：芯片路由器架构上的容错分层网络
- 作者：Neishaburi M.H.;Zilic Zeljko
- 会议名称：《IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems》 | 2011年
- Hierarchical Network;
- Network on Chip;
35.Modeling Yield of Self-Healing Carbon Nanotubes/Silicon-Nanowire FET-based Nanoarray

机译：自愈合碳纳米管/硅 - 纳米线FET基纳米阵列的建模产量
- 作者：Seol J.;Park N.J.;George K.M.;Park N.
- 会议名称：《IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems》 | 2011年
- Carbon Nanotubes;
- Nanoarray;
- Self-Healing;
- Silicon-Nanowires;
- Yield;
36.Duplicated Execution Method for NoC-based Multiple Processor Systems with Restricted Private Memories

机译：具有限制私人存储的基于NOC的多处理器系统的重复执行方法
- 作者：Imai Masashi;Yoneda Tomohiro
- 会议名称：《IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems》 | 2011年
- Dependability;
- Fault diagnosis;
- MTTF;
- Multiple processor system;
- Network-on-Chip;
37.Diagnosis of Multiple Faults Based on Fault-Tuple Equivalence Tree

机译：基于故障 - 元组等效树的多故障诊断
- 作者：Tang Xun;Cheng Wu-Tung;Guo Ruifeng;Tang Huaxing;Reddy Sudhakar M.
- 会议名称：《IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems》 | 2011年
38.A Unified Error Control Coding Scheme to Enhance the Reliability of a Hybrid Wireless Network-on-Chip

机译：统一错误控制编码方案，提升混合无线网络的可靠性
- 作者：Ganguly Amlan;Pande Partha;Belzer Benjamin;Nojeh Alireza
- 会议名称：《IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems》 | 2011年
- Error Control Coding;
- Network-on-Chip;
- Wireless Interconnects;
39.A Soft Error Tolerance Estimation Method for Sequential Circuits

机译：顺序电路的软误差容差估计方法
- 作者：Yoshimura Masayoshi;Akamine Yusuke;Matsunaga Yusuke
- 会议名称：《IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems》 | 2011年
- Markov model;
- absorption probability;
- sequential circuits;
- soft error;
- soft error tolerance;
- the modified product machine;
40.A Novel Topology-Independent Router Architecture to Enhance Reliability and Performance of Networks-on-Chip

机译：一种独立的拓扑路由器架构，可以增强芯片网络的可靠性和性能
- 作者：Latif Khalid;Rahmani Amir-Mohammad;Nigussie Ethiopia;Tenhunen Hannu;Seceleanu Tiberiu
- 会议名称：《IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems》 | 2011年
- Fault Tolerance;
- Networks-on-Chip (NoC);
- Resource Utilization;
- Virtual Channel Sharing;
41.A Power Transmission Line Fault Distance Estimation VLSI Chip: Design and Defect Tolerance

机译：电力传输线故障距离估计VLSI芯片：设计和缺陷公差
- 作者：MacLean E.;Jain V. K.
- 会议名称：《IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems》 | 2011年
- Radojevic algorithm.;
- Smart grid;
- arcing fault;
- defect tolerance;
- fault distance;
- system on a chip;
42.Impact of Synthesis Constraints on Error Propagation Probability of Digital Circuits

机译：合成约束对数字电路误差传播概率的影响
- 作者：Limbrick Daniel B.;Yue Suge;Robinson William H.;Bhuva Bharat L.
- 会议名称：《IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems》 | 2011年
- combinational logic;
- constraint optimization;
- error propagation probability;
- logic synthesis;
- logical masking;
- soft error;
43.Fine-Grained Software-Based Self-Repair of VLIW Processors

机译：基于软件的VLIW处理器的微粒自我修复
- 作者：Schamp;#x0F6;lzel Mario
- 会议名称：《IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems》 | 2011年
44.Biased Voting for Improved Yield in Nanoscale Fabrics

机译：纳米尺度织物提高产量的偏见投票
- 作者：Khan Md. Muwyid U.;Narayanan Pritish;Vijayakumar Priyamvada;Koren Israel;Krishna C. Mani;Moritz C. Andras
- 会议名称：《IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems》 | 2011年
- Biased Voting;
- Fault Probability Ratio;
- NASICs;
- Signal Reliability;
- TMR;
- Yield;
45.Decimal Hamming: A Software-Implemented Technique to Cope with Soft Errors

机译：十进制汉语：一种用于应对软错误的软件实现的技术
- 作者：Argyrides Costas;Ferreira Ronaldo Rodrigues;Lisboa Carlos A.;Carro Luigi
- 会议名称：《IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems》 | 2011年
- Design for Reliability;
- Embedded Systems;
- Error Detection mp;
- #x0026;
- Correction;
- Fault-Tolerance;
- Soft Error;
46.Model for Thermal Behavior of Shaded Photovoltaic Cells under Hot-Spot Condition

机译：热点条件下阴影光伏电池的热行为模型
- 作者：Giaffreda Daniele;Omaamp;#x0F1;a Martin;Rossi Daniele;Metra Cecilia
- 会议名称：《IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems》 | 2011年
- energy efficiency;
- hot-spot heating;
- reliability;
- solar cell;
47.A New Bulk Built-In Current Sensor-Based Strategy for Dealing with Long-Duration Transient Faults in Deep-Submicron Technologies

机译：一种新的散装基于传感器的基于传感器的策略，用于在深亚微米技术中处理长期瞬态断层
- 作者：Bastos Rodrigo P.;Natale Giorgio Di;Flottes Marie-Lise;Rouzeyre Bruno
- 会议名称：《IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems》 | 2011年
- concurrent error detection schemes;
- fault attacks;
- long-duration transient faults;
- soft errors;
48.A Probabilistic Approach to Diagnose SETs

机译：诊断套装的概率方法
- 作者：Gangadhar Sreenivas;Tragoudas Spyros
- 会议名称：《IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems》 | 2011年
- BDD;
- Boolean difference;
- SET;
- diagnosis;
49.A Reliability-Aware Partitioner for Multi-FPGA Platforms

机译：用于多FPGA平台的可靠性感知分区
- 作者：Bolchini Cristiana;Sandionigi Chiara
- 会议名称：《IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems》 | 2011年
- Multi-FPGA;
- Partitioning;
- Reliability;
50.Templated-Based Asynchronous Design for Testable and Fail-Safe Operation

机译：基于模板的异步设计，可测试和故障安全操作
- 作者：Zamani Masoud;Pedram Hossein;Lombardi Fabrizio
- 会议名称：《IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems》 | 2011年
- PCFB;
- Testable design;
- asyncronous design;
- fail-safe;
- template;
51.Optimal Test Set Selection for Fault Diagnosis Improvement

机译：最佳测试集选择故障诊断改进
- 作者：Amati L.;Bolchini C.;Salice F.
- 会议名称：《IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems》 | 2011年
- Fault Diagnosis;
- Integer Linear Programming.;
- Test-sets minimization;
52.X-Stacking - A Method for Reducing Control Data for Output Compaction

机译：X堆叠 - 一种减少输出压实控制数据的方法
- 作者：Datta Rudrajit;Touba Nur A.
- 会议名称：《IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems》 | 2011年
- X stacking;
- output compression;
- output masking;
53.A Schematic-Based Extraction Methodology for Dislocation Defects in Analog/Mixed-Signal Devices

机译：模拟/混合信号设备中的错位缺陷的基于示意性提取方法
- 作者：Rai Nivesh;Hashempour Hamidreza;Xing Yizi;Kruseman Bram;Hamdioui Said
- 会议名称：《IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems》 | 2011年
- Analog Mixed-Signal Testing;
- Defect Extraction;
- Defect Oriented Test;
- Dislocation Defects;
- Schematic;
54.Reliable Hardware Architectures for the Third-Round SHA-3 Finalist Grostl Benchmarked on FPGA Platform

机译：在FPGA平台上基准测试的第三轮SHA-3 Finalist Grostl的可靠硬件架构
- 作者：Mozaffari-Kermani Mehran;Reyhani-Masoleh Arash
- 会议名称：《IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems》 | 2011年
- FPGA platform;
- Fault detection scheme;
- Gramp;
- #x0F8;
- stl;
- SHA-3;
- reliable hardware implementation;
55.An Area Effective Parity-Based Fault Detection Technique for FPGAs

机译：用于FPGA的一个有效奇偶校验的故障检测技术
- 作者：Nazar Gabriel L.;Carro Luigi
- 会议名称：《IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems》 | 2011年
- FPGA;
- concurrent error detection;
- parity codes;
56.Spatial and Temporal Data Path Remapping for Fault-Tolerant Coarse-Grained Reconfigurable Architectures

机译：用于容错粗粒度可重新配置架构的空间和时间数据路径重新映射
- 作者：Eisenhardt Sven;Kamp;#x0FC;ster Anja;Schweizer Thomas;Kuhn Tommy;Rosenstiel Wolfgang
- 会议名称：《IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems》 | 2011年
- coarse-grained;
- compilation;
- fault tolerance;
- permanent error;
- reconfigurable;
- remapping;
57.Analyzing the Sensitivity to Faults of Synchronization Primitives

机译：分析同步基元故障的敏感性
- 作者：Grassi Paolo Roberto;Sami Mariagiovanna;Speziale Ettore;Tartara Michele
- 会议名称：《IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems》 | 2011年
58.A New Algorithm for Post-Silicon Clock Measurement and Tuning

机译：一种新的硅时钟测量和调谐算法
- 作者：Lak Zahra;Nicolici Nicola
- 会议名称：《IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems》 | 2011年
- Post-silicon clock tuning;
- configuration of clock tuning elements;
- setup/hold-time violations;
59.CNT-count Failure Characteristics of Carbon Nanotube FETs under Process Variations

机译：过程变化下碳纳米管FET的CNT计数故障特性
- 作者：Ghavami Behnam;Raji Mohsen;Pedram Hossein;Arjmand Omid Naghshineh
- 会议名称：《IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems》 | 2011年
- CNT-count;
- Carbon Nanotube Field Effect Transistor (CNFET);
- Defect Modeling;
- Failure;
- Variation;
60.On the Modeling of Gate Delay Faults by Means of Transition Delay Faults

机译：转换延迟故障浇筑闸门延迟故障的建模
- 作者：Bernardi P.;Reorda M. Sonza;Bosio A.;Girard P.;Pravossoudovitch S.
- 会议名称：《IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems》 | 2011年
- Fault modeling;
- Gate Delay fault;
- Transition Delay faults;
61.Fast RTL Fault Simulation Using Decision Diagrams and Bitwise Set Operations

机译：使用判定图和按位设置操作快速RTL故障仿真
- 作者：Reinsalu Uljana;Raik Jaan;Ubar Raimund;Ellervee Peeter
- 会议名称：《IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems》 | 2011年
- fault simulation;
- high-level decision diagrams;
- register-transfer level;
62.On the Delay Analysis of Defective CNTFETs with Undeposited CNTs

机译：关于未结核CNT的缺陷CNTFET的延迟分析
- 作者：Cho Geunho;Lombardi Fabrizio
- 会议名称：《IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems》 | 2011年
- CNT;
- CNTFET;
- Defect modeling;
- emerging technologies;
- manufacturing;
63.Efficient Function Mapping in Nanoscale Crossbar Architecture

机译：纳米级横杆架构中的高效函数映射
- 作者：Yang Joon-Sung;Datta Rudrajit
- 会议名称：《IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems》 | 2011年
64.Generating Burst-Error Correcting Codes from Orthogonal Latin Square Codes -- A Graph Theoretic Approach

机译：从正交拉丁平方码生成突发误差校正代码 - 图形理论方法
- 作者：Datta Rudrajit;Touba Nur A.
- 会议名称：《IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems》 | 2011年
- Orthogonal Latin Square;
- burst error;
- graph coloring;
65.On the Effects of Intra-gate Resistive Open Defects in Gates at Nanoscaled CMOS

机译：纳米型CMOS栅极栅极电阻打开缺陷的影响
- 作者：Rajderkar Nachiket;Ottavi Marco;Pontarelli Salvatore;Han Jie;Lombardi Fabrizio
- 会议名称：《IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems》 | 2011年
66.Impact of Aging Phenomena on Soft Error Susceptibility

机译：老化现象对软误差易感性的影响
- 作者：Rossi Daniele;Omaamp;#x0F1;a Martin;Metra Cecilia;Paccagnella Alessandro
- 会议名称：《IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems》 | 2011年
- NBTI;
- critical charge;
- reliability;
- soft errors;
67.SoC Mixed-Signal Dependability Enhancement: A Strategy from Design to End-of-Life

机译：SOC混合信号可靠性增强：从设计到寿命结束的策略
- 作者：Khan Muhammad A.;Kerkhoff Hans G.
- 会议名称：《IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems》 | 2011年
68.Enhanced Defect Tolerance through Matrixed Deployment of Intelligent Sensors for the Smart Power Grid

机译：通过智能电网智能传感器的矩阵部署增强了缺陷容差
- 作者：Jain Vijay K.;Chapman Glenn H.
- 会议名称：《IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems》 | 2011年
69.Reducing Test Power for Embedded Memories

机译：降低嵌入式记忆的测试力量
- 作者：Awad Ahmed;Abu-Issa Abdallatif;Hamdioui Said
- 会议名称：《IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems》 | 2011年
- Average power;
- March Test;
- Memory BIST;
- Parallel testing;
- Peak power;
- Word oriented SRAM;
70.A Transistor-Level Stochastic Approach for Evaluating the Reliability of Digital Nanometric CMOS Circuits

机译：一种评价数字纳米CMOS电路可靠性的晶体管级随机方法
- 作者：Chen Hao;Han Jie;Lombardi Fabrizio
- 会议名称：《IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems》 | 2011年
- Logic circuits;
- Nanometric CMOS;
- Reliability evaluation;
- Soft errors;
- Stochastic computation;
71.An Application-Level Dependability Analysis Framework for Embedded Systems

机译：嵌入式系统的应用级可靠性分析框架
- 作者：Bolchini Cristiana;Miele Antonio
- 会议名称：《IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems》 | 2011年
- Dependability analysis;
- Fault injection;
- Microprocessors;
72.A Metric for Weight Assignment to Optimize the Performance of MOBILE Threshold Logic Gate

机译：重量分配的度量，以优化移动阈值逻辑门的性能
- 作者：Dara Chandra Babu;Tragoudas Spyros;Haniotakis Themistoklis
- 会议名称：《IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems》 | 2011年
73.Error Resilient Infrastructure for Data Transfer in a Distributed Neutron Detector

机译：分布式中子探测器中数据传输的误差弹性基础设施
- 作者：Dilillo Luigi;Bosio Alberto;Valka Miroslav;Girard Patrick;Pravossoudovitch Serge;Virazel Arnaud
- 会议名称：《IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems》 | 2011年
- Sensor;
- fault tolerance;
- modular system;
- neutrons;
- reliability;
74.Deletion/Insertion/Reversal Error Correcting Codes for Bit-Patterned Media Recording

机译：删除/插入/反转误差校正位图案介质录制的代码
- 作者：Inoue Masato;Kaneko Haruhiko
- 会议名称：《IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems》 | 2011年
- Bit-patterned media (BPM);
- Levenshtein code;
- deletion/insertion errors;
75.An Architecture to Enable Life Cycle Testing in CMPs

机译：一种在CMPS中实现生命周期测试的架构
- 作者：Rodrigues Rance;Koren Israel;Kundu Sandip
- 会议名称：《IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems》 | 2011年
- low-cost test;
- microprocessor test;
- online fault detection;
- opportunistic test;
76.On the Reliable Performance of Sequential Adders for Soft Computing

机译：关于软计算的顺序加法器的可靠性能
- 作者：Liang Jinghang;Han Jie;Lombardi Fabrizio
- 会议名称：《IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems》 | 2011年
- Approximate logic;
- Error masking;
- Imprecise arithmetic;
- Mean error distance;
- Reliability;
- Sequential adders;
- Soft computing;
77.Characterizing System-Level Vulnerability for Instruction Caches against Soft Errors

机译：用于对柔软误差的指令缓存的系统级漏洞
- 作者：Wang Shuai
- 会议名称：《IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems》 | 2011年
- Instruction Cache;
- Reliability;
- Soft Errors;
- Vulnerability Factor;
78.An FPGA-Emulation-Based Platform for Characterization of Digital Baseband Communication Systems

机译：基于FPGA仿真的平台，用于数字基带通信系统的表征
- 作者：Lagos-Benites J.;Grosso M.;Reorda M. Sonza;Audisio G.;Pipponzi M.;Sabatini M.;Avantaggiati V.A.
- 会议名称：《IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems》 | 2011年
- FPGA;
- characterization;
- clock frequency offset;
- digital baseband;
- noise;
- validation;
79.Online Missing/Repeated Gate Faults Detection in Reversible Circuits

机译：可逆电路中的在线缺失/重复门故障检测
- 作者：Zamani Masoud;Tahoori Mehdi B.
- 会议名称：《IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems》 | 2011年
- Missing/Repeated Gate Fault;
- Online Testing;
- Reversible Logic;
80.Control-Flow Recovery Validation Using Microarchitectural Invariants

机译：使用微架构不变的控制流程恢复验证
- 作者：Carretero Javier;Abella Jaume;Vera Xavier;Chaparro Pedro
- 会议名称：《IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems》 | 2011年
- RAT recovery;
- bugs;
- control logic;
- error detection;
- hard errors;
- microarchitecture;
- post-Si validation;
- soft errors;
81.An adaptive routing algorithm to improve lifetime reliability in NoCs architecture

机译：一种自适应路由算法，提高NOCS架构中的寿命可靠性
- 作者：Juman Alshraiedeh;Avinash Kodi
- 会议名称：《IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems》 | 2016年
- Routing;
- Aging;
- Ports (Computers);
- Transistors;
- Integrated circuit reliability;
- Negative bias temperature instability;
82.In-field functional test programs development flow for embedded FPUs

机译：现场功能测试程序嵌入式FPU的开发流程
- 作者：R. Cantoro;D. Piumatti;P. Bernardi;S. De Luca;A. Sansonetti
- 会议名称：《IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems》 | 2016年
- Program processors;
- Registers;
- Circuit faults;
- Microprocessors;
- Built-in self-test;
- Adders;
83.A novel method for SEE validation of complex SoCs using Low-Energy Proton beams

机译：一种新的方法，用于了解使用低能量质子束的复杂SOC验证
- 作者：Gianluca Furano;Stefano Di Mascio;Tomasz Szewczyk;Alessandra Menicucci;Luigi Campajola;Francesco Di Capua;Andrea Fabbri;Marco Ottavi
- 会议名称：《IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems》 | 2016年
- Protons;
- Aerospace electronics;
- Random access memory;
- Ions;
- Clocks;
- Microcontrollers;
- Testing;
84.Design and characterization of a high-safety hardware/software module for the acquisition of Eurobalise telegrams

机译：用于获取Eurobalise电报的高安全硬件/软件模块的设计与鉴定
- 作者：Filippo Giuliani;Marco Ottavi;Gian Carlo Cardarilli;Marco Re;Luca Di Nunzio;Rocco Fazzolari;Antimo Bruno;Francesco Zuliani
- 会议名称：《IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems》 | 2016年
- Field programmable gate arrays;
- Safety;
- Hardware;
- Standards;
- Rail transportation;
- Built-in self-test;
- Software;
85.Guiding Genetic Algorithms using importance measures for reliable design of embedded systems

机译：利用可靠设计的重要措施指导遗传算法
- 作者：Hananeh Aliee;Stefan Vitzethum;Michael Gla?;Jürgen Teich;Emanuele Borgonovo
- 会议名称：《IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems》 | 2016年
- Optimization;
- Genetic algorithms;
- Embedded systems;
- Space exploration;
- Reliability engineering;
- Redundancy;
86.Design and analysis of an approximate 2D convolver

机译：近似2D康沃尔的设计与分析
- 作者：Ke Chen;Fabrizio Lombardi;Jie Han
- 会议名称：《IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems》 | 2016年
- Kernel;
- Two dimensional displays;
- Convolvers;
- Approximation algorithms;
- Algorithm design and analysis;
- Approximate computing;
87.Detecting intermittent resistive faults in digital CMOS circuits

机译：检测数字CMOS电路中间歇电阻故障
- 会议名称：《IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems》 | 2016年
88.Can flexible, domain specific programmable logic prevent IP theft?

机译：可以灵活，域特定的可编程逻辑防止IP盗窃？
- 作者：Xiaotong Cui;Kaijie Wu;Siddharth Garg;Ramesh Karri
- 会议名称：《IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems》 | 2016年
- IP networks;
- Foundries;
- Security;
- Schedules;
- Adders;
- Digital signal processing;
- Intellectual property;
89.On meta-obfuscation of physical layouts to conceal design characteristics

机译：关于物理布局的荟萃混淆隐藏设计特征
- 作者：Vinay C. Patil;Arunkumar Vijayakumar;Sandip Kundu
- 会议名称：《IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems》 | 2016年
- Reverse engineering;
- Standards;
- Logic gates;
- Visualization;
- Libraries;
- Integrated circuits;
- Metals;
90.Efficient utilization of hierarchical iJTAG networks for interrupts management

机译：高效利用分层IJTAG网络进行中断管理
- 作者：Ahmed Ibrahim;Hans G. Kerkhoff
- 会议名称：《IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems》 | 2016年
- Instruments;
- Registers;
- System-on-chip;
- Organizations;
- Standards;
- Clocks;
- Testing;
91.A new approach to deadlock-free fully adaptive routing for high-performance fault-tolerant NoCs

机译：一种新的高性能容错Nocs僵局完全自适应路由的新方法
- 作者：Amir Charif;Nacer-Eddine Zergainoh;Michael Nicolaidis
- 会议名称：《IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems》 | 2016年
- Ports (Computers);
- Routing;
- System recovery;
- Fault tolerance;
- Fault tolerant systems;
- Adaptation models;
- Algorithm design and analysis;
92.Applying efficient fault tolerance to enable the preconditioned conjugate gradient solver on approximate computing hardware

机译：应用高效的容错才能使预处理的共轭梯度求解器在近似计算硬件上启用
- 作者：Alexander Sch?ll;Claus Braun;Hans-Joachim Wunderlich
- 会议名称：《IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems》 | 2016年
- Hardware;
- Resilience;
- Fault tolerance;
- Fault tolerant systems;
- Runtime;
- Convergence;
- Approximate computing;
93.In-place LUT polarity inVersion to mitigate soft errors for FPGAs

机译：就地LUT极性反转以减轻FPGA的软错误
- 作者：Juexiao Su;Ju-Yueh Lee;Chang Wu;Lei He
- 会议名称：《IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems》 | 2016年
- Field programmable gate arrays;
- Circuit faults;
- Integrated circuit interconnections;
- Switches;
- Routing;
- Table lookup;
- Emulation;
94.Fault-aware sensitivity analysis for probabilistic real-time systems

机译：概率实时系统的故障感知敏感性分析
- 作者：Luca Santinelli;Zhishan Guo;Laurent George
- 会议名称：《IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems》 | 2016年
- Mathematical model;
- Safety;
- Analytical models;
- Sensitivity analysis;
- Probabilistic logic;
- Timing;
95.Combined on-line lifetime-energy optimization for asymmetric multicores

机译：组合在线寿命 - 能量优化对不对称多电线
- 作者：Cristiana Bolchini;Matteo Carminati;Tulika Mitra;Thannirmalai Somu Muthukaruppan
- 会议名称：《IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems》 | 2016年
- Optimization;
- Energy consumption;
- Multicore processing;
- Reliability;
- Quality of service;
- Mathematical model;
96.BTI aware thermal management for reliable DVFS designs

机译：BTI意识到可靠的DVFS设计的热管理
- 作者：Hardeep Chahal;Vasileios Tenentes;Daniele Rossi;Bashir M. Al-Hashimi
- 会议名称：《IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems》 | 2016年
- Stress;
- Logic gates;
- Transistors;
- Aging;
- Integrated circuit modeling;
- Propagation delay;
- Reliability;
97.Bounding error detection latency in safety critical systems with enhanced Execution Fingerprinting

机译：增强型执行指纹安全关键系统中的界限错误检测延迟
- 作者：Mojing Liu;Brett H. Meyer
- 会议名称：《IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems》 | 2016年
- Registers;
- Fingerprint recognition;
- Checkpointing;
- Hardware;
- Redundancy;
- Error correction codes;
- Radiation detectors;
98.A Highly Robust Double Node Upset Tolerant latch

机译：一个非常稳定的双节点翻转容错锁
- 作者：Adam Watkins;Spyros Tragouodas
- 会议名称：《IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems》 | 2016年
- Latches;
- Clocks;
- Delays;
- Power demand;
- Robustness;
- Transistors;
- Impedance;
99.Prognosis of NBTI aging using a machine learning scheme

机译：使用机器学习方案的NBTI老化预后
- 作者：Naghmeh Karimi;Ke Huang
- 会议名称：《IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems》 | 2016年
100.Construction of a soft error (SEU) hardened Latch with high critical charge

机译：施工柔软的错误（SEU）硬化闩锁，具有高批评电荷
- 作者：Hiroki Ueno;Kazuteru Namba
- 会议名称：《IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems》 | 2016年
- Latches;
- DH-HEMTs;
- Robustness;